MRAM, based on the integration of silicon CMOS with magnetic tunnel junction (MTJ) technology, is a major emerging technology that is highly competitive with existing semiconductor memories such as SRAM, DRAM, Flash, etc. A conventional MRAM device generally includes two magnetic layers. Magnetization of one layer is always pinned in a certain direction either through an exchange coupling field from other layers such as in a synthetic anti-ferromagnetic (SAF) structure, or through internal anisotropy of the pinned layer itself. The pinned layer serves as the reference layer (RL) for the second magnetic layer (free layer or FL) whose magnetic moment is free to switch from a direction parallel to that of the pinned layer (low resistance state) to a direction anti-parallel to the pinned layer (high resistance state), or vice versa. The FL, RL, and a third non-magnetic layer formed between the free and pinned layers form a magnetoresistive (MR) junction so that when FL magnetization direction rotates due to an applied magnetic field, the resistance change across the junction is measured by a voltage signal from a DC current applied across the junction. When the middle non-magnetic layer is a metal, the resulting junction is a Giant Magnetoresistive (GMR) sensor and when the middle non-magnetic layer is a dielectric material, a tunneling magnetoresistive (TMR) sensor is established. Thus, by flipping FL magnetization between two distinctive magnetization states defined by either shape anisotropy or other anisotropies, which do not exchange spontaneously, the junction can serve as a magnetic memory unit (cell) for data storage. In a MRAM cell, FL is also referred to as a storage layer and the middle non-magnetic layer is typically a dielectric material.
Switching of the storage layer magnetization can be accomplished by an external field. In MRAM, each single cell is required to be switchable without switching other cells. In conventional field MRAM, two current carrying metal lines cross above and below a given MRAM cell in a crosspoint configuration so that the total field generated by the current from the two lines is able to switch only the cell where they intersect. However, in reality, the magnetic field still exists although at a reduced level for all cells that lie on either of the two metal lines thereby causing a so called “half-select” problem which requires a higher energy barrier to switch each cell. Another characteristic of MRAM is that intrinsic switching field distribution (SFD) of each cell requires a low switching field to guarantee 100% success rate during switching. Therefore, the two intrinsic problems (half-select and SFD) make conventional field switching MRAM difficult to optimize because of a narrow operation margin.
Additional effort relating to the field switching scheme to enable less perturbing of non-switching cells and easier switching of switching cells is to locally reduce the magnetic energy barrier for switching by introducing heating of the cell to be switched. Several prior art examples are mentioned below and are mainly focused on using a high anisotropy material, either by intrinsic crystalline anisotropy or exchange coupling to an anti-ferromagnetic material, whose anisotropy energy decreases as temperature increases. U.S. Pat. No. 6,603,678 describes a magnetic memory element that is written to by heating the memory element and applying at least one magnetic field to the memory element. In U.S. Pat. No. 7,771,534, a MRAM has a free magnetic electrode and a stable magnetic electrode with an adjacent oxide layer. The oxide layer has a resistance at levels to allow sufficient power dissipation to lower the anisotropy of the free magnetic electrode through current induced heating. U.S. Pat. No. 6,961,263 discloses a magnetic storage cell with a set of conductors used to write data to a storage cell and a second set of conductors used to heat the magnetic storage cell and read data from the magnetic storage cell. In U.S. Patent App. Publication 2006/0291276, the operating temperature of the reading memory or resting memory is selected in such a way that it is lower than the blocking temperature of the free and trapped layers. U.S. Pat. No. 6,911,685 describes a thermally assisted magnetic memory structure with a first conductor surrounded by cladding, a memory cell thermally isolated from the first conductor, and a second conductor electrically contacting the memory cell. U.S. Pat. No. 7,180,770 discloses a storage device which includes a plurality of heating elements connected in series with magnetic memory elements in which each heating element comprises a diode that produces heat to facilitate the device write function.
The operation of designs in the aforementioned prior art relies on a current flowing through the device to generate heat in the data storage layer to enable switching of the data storage layer. While a half-select field still exists in other devices due to heating not being exerted, accidental switching is avoided by a high anisotropy field in the storage layer. It is important to note in the prior art that the data storage layer is always part of the signal generation layer such as a free layer or reference layer of a MR junction. Furthermore, the current needed for heating is usually not insignificant. As a result, if the current heating up the data storage layer also passes through the MR junction, the junction material which is usually an oxide for higher signal from a MRAM cell, can degrade over time and may impose practical reliability concerns.
The most recent MRAM scheme (STT-RAM) utilizes a spin-torque effect where an electric current flowing from one magnetic layer to a second magnetic layer is able to impose magnetic torque on the magnetizations of the layers. In the spin-torque effect, the data storage layer's magnetization in a given MRAM cell is switchable by a localized current flowing through the cell and thereby eliminates the half-select problem. However, a significant amount of current still flows through the tunnel barrier layer (MR junction) which means junction reliability continues to be a practical concern because of high current density.
In other prior art references, U.S. Patent App. Publication 2007/0189064 describes a random access memory cell that can store multiple information states in a single bit. A conventional MTJ is magnetostatically coupled to a reference stack and the magnetic moment of the free layer can be changed in small increments with each unique direction corresponding to a different information state. In U.S. Pat. No. 7,009,877, a magnetic memory device is disclosed and includes a spin transfer driven element disposed between a first terminal and a second terminal, and a readout element disposed between the second terminal and a third terminal. A phase change RAM (PRAM) is illustrated in U.S. Patent Application 2007/0184613 and includes a resistance element having a diode function. The PRAM may have a substrate, a phase change diode layer formed on the substrate, and an upper electrode on the phase change diode layer.